![]() ![]() Is that true, or an Hm, I did not know that about PSRR. If I understand correctly, Q3 is your "emitter follower" (sort of), and Q4 and Q5 combine to create a constant current source, which would deter a low-impedance load from drawing so much current away from the output transistor. It's interesting looking at an "upside down" design. See attachment, with 70 mA of bias current running through Cool, thanks. the overall gain was noticeable less with 32Ω load versus an open). What I found was that by decreasing the emitter resister I could indeed reduce the output impedance, but it was still being loaded down by a low-impedance load (i.e. I'd also consider using a different bias scheme for the first transistor than just the 470K to the base - use a two resistor divider so you can stay away from the negative rail and end up with some voltage swing, after you get all the rest sorted out.Ībraxalito: What is Iq? To me that means quiescent current, which I assume is the DC collector current on the output BJT when the input is grounded, is that correct? By choosing a suitably low value for the emitter follower's emitter resistor, you can select the bias of that stage, and dial in exactly the output conductance you want. One could add an emitter follower stage onto your common emitter stage, instead of the op amp, and it could work pretty well. Emitter follower stages are typically used to drive low-Z loads. Nobody uses a common emitter stage to drive a low impedance load - they're typically used for gain, loaded into a high-Z. Honestly, a different circuit would work a lot better. To solve this, you could use bipolar supplies, bias the transistor stage "up", so the collector ends up at 5V or higher, or use some sort of coupling cap arrangement into the OP275 and a pair of resistors to bias the OP275 input halfway between the supplies. ![]() So, if you stuff 0.6V into the input stage, and it's not going to be happy with anything less than 4.5V, it may well be horribly noisy. According to my datasheets, the input common mode voltage range of the OP275 is a lot narrower than "right next to the rails", around 4.5V away from the plus or minus rail. I'm too lazy to simulate, but the DC value at the collector of the transistor could be as low as 0.6V or so above ground. It's not clear to me what the DC bias values are at the input of the OP275. the "OPA275" buffer - is it really an OP275? -) So, crank up the bias, and you lower the output Z. The transconductance 'g' is roughly equal to 40 * Iq, and the output impedance is roughly 1/g. The standard way to lower the output impedance of a class A transistor stage is to increase the bias current. R10 and R11 (10Ω) are just there to make LTspice happy. So, what gives? Why is the op-amp so noisy? Is there a better impedance transformer design I could use? I expected it to be dead silent, since the output from Q1 alone is dead silent, and the op-amp has unity gain and is also dead silent without any input connected. It simulates great, but when I built it on a protoboard it is EXTREMELY noisy – there is a very loud hiss when the op-amp is connected to the output of Q1. I hit upon the idea of using a unity-gain op-amp (OPA275) to act as a buffer (see attachment), similar to how the O2 works, except with a biased input. If that could be lowered, I'd love to use that design and keep everything BJTs, but I could not find a way. I tried using a common collector (emitter follower) as an impedance transformer, but even that output impedance was too high – I measured around 60Ω. The output impedance of a Class A amp is too high, and I am trying to transform it to something much lower – on the order of 1Ω – so that I can drive low-impedance headphones (e.g. I have designed and built a simple Class A amplifier to drive headphones. ![]()
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